Chapter No.3
Convert equation into standard SOP and POS form
Design of Half and Full Adder
Design of Half and Full Subtractor
Simply using K map and realize equations using Basic gates
Driving seven segment display using 7447 decoder
Any one multiplexer with Block diagram, truth table, equation and implementation
Any one Demultiplexer with Block diagram, truth table, equation and implementation
74147 encoder with truth table
Mux and Demux tree
Chapter No. 4
JK flip flop
SR flip flop
Asynchronous counter
Synchronous counter
One bit memory cell
Differentiate between combinational logic & Sequential logic circuits
Different types of triggering methods
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